Cyclops64

The projects were started in response to the announced construction of the Earth Simulator.

The architecture was conceived by Seymour Cray Award winner Monty Denneau, who is currently leading the project.

A thread unit is an in-order 64-bit RISC core with 32 kB scratch pad memory, using a 60-instruction subset of the Power ISA instruction set.

The processors will be connected with a 96 port, 7 stage non-internally blocking crossbar switch.

The theoretical peak performance of a Cyclops64 chip is 80 gigaflops (this assumes a continuous stream of multiply–accumulate instructions, each of which are counted as two floating-point operations).