It was manufactured using the HMOS process, allowing it to have higher transistor density, and lower cost, while dissipating less heat.

The major advantage of this style of access is that the two chips do not have to communicate to pause each other, they simply watch the already-existing clock signal present on the 6502's pins.

When the clock runs at double-speed, it faces the problem that there is not enough time for the VIC to access memory during the free half-cycles.

For this reason, the 8502 could only run at double-speed full-time when being used with the 80-column VDC in the C128, which had separate memory for the display that was not being directly accessed by the CPU.

When running a VIC display mode, the two chips began to share access as was the case in the C64, and this meant the CPU had to return to its normal ~1 MHz speed.