Magnetoresistive RAM
[1] Developed in the mid-1980s, proponents have argued that magnetoresistive RAM will eventually surpass competing technologies to become a dominant or even universal memory.
[2] Currently, memory technologies in use such as flash RAM and DRAM have practical advantages that have so far kept MRAM in a niche role in the market.
Unlike conventional RAM chip technologies, data in MRAM is not stored as electric charge or current flows, but by magnetic storage elements.
However, due to process and material variations, an array of memory cells has a distribution of switching fields with a deviation σ.
In 2005, a "Savtchenko switching" relying on the unique behavior of a synthetic antiferromagnet (SAF) free layer is applied to solve this problem.
This approach still requires a fairly substantial current to generate the field, however, which makes it less interesting for low-power uses, one of MRAM's primary disadvantages.
Additionally, as the device is scaled down in size, there comes a time when the induced field overlaps adjacent cells over a small area, leading to potential false writes.
One experimental solution to this problem was to use circular domains written and read using the giant magnetoresistive effect, but it appears that this line of research is no longer active.
The authors describe a new term called "Pentalemma", which represents a conflict in five different requirements such as write current, stability of the bits, readability, read/write speed and the process integration with CMOS.
DRAM uses a small capacitor as a memory element, wires to carry current to and from it, and a transistor to control it – referred to as a "1T1C" cell.
The scaling of transistors to higher density necessarily leads to lower available current, which could limit MRAM performance at advanced nodes.
Like MRAM, flash does not lose its memory when power is removed, which makes it very common in applications requiring persistent storage.
In contrast, MRAM requires only slightly more power to write than read, and no change in the voltage, eliminating the need for a charge pump.
IBM researchers have demonstrated MRAM devices with access times on the order of 2 ns, somewhat better than even the most advanced DRAMs built on much newer processes.
For the perpendicular STT MRAM, the switching time is largely determined by the thermal stability Δ as well as the write current.
This makes it expensive, which is why it is used only for small amounts of high-performance memory, notably the CPU cache in almost all modern central processing unit designs.
Given its much higher density, a CPU designer may be inclined to use MRAM to offer a much larger but somewhat slower cache, rather than a smaller but faster one.
The read disturb error rate is given by where τ is the relaxation time (1 ns) and Icrit is the critical write current.
However, this dependence on write current also makes it a challenge to compete with the higher density comparable to mainstream DRAM and Flash.
From a fundamental physics point of view, the spin-transfer torque approach to MRAM is bound to a "rectangle of death" formed by retention, endurance, speed, and power requirements, as covered above.
The power also needs time to be "built up" in a device known as a charge pump, which makes writing dramatically slower than reading, often as low as 1/1000 as fast.
To date, the only similar system to enter widespread production is ferroelectric RAM, or F-RAM (sometimes referred to as FeRAM).
[23] Possible practical application of the MRAM includes virtually every device that has some type of memory inside such as aerospace and military systems, digital cameras, notebooks, smart cards, mobile telephones, cellular base stations, personal computers, battery-backed SRAM replacement, datalogging specialty memories (black box solutions), media players, and book readers etc.
