Motorola 68020

In keeping with naming practices common to Motorola designs, the 68020 is usually referred to as the "020", pronounced "oh-two-oh" or "oh-twenty".

Although even small companies like MOS Technology and Zilog had moved on to silicon gate depletion mode NMOS logic on ever-larger wafers, Motorola was still using metal gates and enhancement mode and their largest fab worked on 4-inch wafers long after most lines had moved to 5-inch.

Although the 68000 met the goal of being the fastest CPU available when it was introduced, it was not nearly as powerful as it could be if it had been designed with more modern techniques.

This line was capable of building all of the new techniques, but the 68000 went ahead with the older design as they were sure it would work.

[5] As this effort was ongoing, Motorola was canvassing their customers for their desires for future developments in the line.

By the early 1980s, similar limitations on all modern CPU designs led to the introduction of the pin grid array that replaced the DIP.

A great debate broke out about how to refer to the underlying design of the new chip in marketing materials.

Technically, the 020 was moving from the long-established NMOS logic design to a CMOS layout, which requires two transistors per gate.

However, it was understood that it would be some time before computers using the new chip would be available, as existing designs would have to be heavily modified to take advantage of its performance.

[11] Gary Johnson concluded the problem was the floor manager of MOS-8, Tom Felesi, and decided to replace him with Bill Walker, who was at that time running the older MOS-2 factory.

Walker arrived at the plant on 5 July 1985 to find Johnson had not bothered to tell Felesi of the change, and arguments followed.

Walker then toured the plant and found it had been turned into what was essentially a research and development lab, not a production line, with numerous bits of machinery in use nowhere else.

[11] One significant issue was a new piece of equipment from a new vendor, Genus, which produced tungsten silicide.

Walker eventually slammed his hand down on the desk, breaking his watch band, and stated "No more excuses!

As part of their ongoing work with Hitachi, Motorola's fabrication system was finally catching up with the competition, as was their internal design workflow.

This gave them considerably more room to work with, allowing the addition of larger processor caches, a built-in memory management unit (MMU) and other features.

Although it ran at the same 16 MHz clock speed, the IIx offered 3.9 MIPS compared to the II's 2.6.

The resulting decrease in bus traffic was particularly important in systems relying heavily on DMA.

Multiprocessing support is implemented externally by the use of an RMC pin[17] to indicate an indivisible read-modify-write cycle in progress.

The larger effective widths of the address registers presented some problem for earlier software that was not considered "32-bit clean".

The 68020 was used in the Apple Macintosh II and Macintosh LC personal computers, Sun-3 workstations, Amiga 1200 (68EC020 variant), the Hewlett-Packard 8711 Series Network Analyzers, HP 9000/320, HP 9000/330, Apollo Computer's DN3000 and DN4000 workstations,[20] and the Alpha Microsystems AM-2000.

The 68020 was an alternative upgrade to the Sinclair QL's 68008 in the Super Gold Card interface by Miracle Systems.

The Nortel Networks DMS-100 telephone central office switch also used the 68020 as the first microprocessor of the SuperNode computing core.

XC68020, a prototype of the 68020
Motorola 68020
Motorola 68020 die shot
bottom view of a Motorola XC68020
Motorola MC68EC020
MC68EC020 in 20mm × 14mm QFP package