p–n junction isolation

By surrounding a transistor, resistor, capacitor or other component on an IC with semiconductor material which is doped using an opposite species of the substrate dopant, and connecting this surrounding material to a voltage which reverse-biases the p–n junction that forms, it is possible to create a region which forms an electrically isolated "well" around the component.

If the p-type material within the n-type ring is now connected to the negative terminal of the power supply and the n-type ring is connected to the positive terminal, the 'holes' in the p-type region are pulled away from the p–n junction, causing the width of the nonconducting depletion region to increase.

When the electric field increases beyond a critical level, the junction breaks down and current begins to flow by avalanche breakdown.

In an article entitled "Microelectronics", published in Scientific American, September 1977 Volume 23, Number 3, pp.

When Robert Noyce invented the monolithic integrated circuit in 1959, his idea of p–n junction isolation was based on Hoerni's planar process.