Racetrack memory

[1] It is a current topic of active research at the Max Planck Institute of Microstructure Physics in Dr. Parkin's group.

Delay-line memory, such as mercury delay lines of the 1940s and 1950s, are a still-earlier form of similar technology, as used in the UNIVAC and EDSAC computers.

The primary concern in terms of construction was practical; whether or not the three dimensional vertical arrangement would be feasible to mass-produce.

Projections in 2008 suggested that racetrack memory would offer performance on the order of 20-32 ns to read or write a random bit.

The only current technology that offered a clear latency benefit over racetrack memory was SRAM, on the order of 0.2 ns, but at a higher cost.

Field-MRAM offers excellent performance as high as 3 ns access time, but requires a large 25-40 F² cell size.

The highest densities from any of these devices is offered by PCRAM, with a cell size of about 5.8 F², similar to flash memory, as well as fairly good performance around 50 ns.

For example, 50 ns allows about five bits to be operated in a racetrack memory device, resulting in an effective cell size of 20/5=4 F², easily exceeding the performance-density product of PCM.

For instance, hard drives appeared to be reaching theoretical limits around 650 nm²/bit,[5] defined primarily by the capability to read and write to specific areas of the magnetic surface.

One limitation of the early experimental devices was that the magnetic domains could be pushed only slowly through the wires, requiring current pulses on the orders of microseconds to move them successfully.

[11] Recently researchers have proposed non-geometrical approaches such as local modulation of magnetic properties through composition modification.