Self-aligned gate

Integrated circuits (ICs, or "chips") are produced in a multi-step process that builds up multiple layers on the surface of a disk of silicon known as a "wafer".

Each layer is patterned by coating the wafer in photoresist and then exposing it to ultraviolet light being shone through a stencil-like "mask".

Depending on the process, the photoresist that was exposed to light either hardens or softens, and in either case, the softer parts are then washed away.

The result is a microscopic pattern on the surface of the wafer where a portion of the top layer is exposed while the rest is protected under the remaining photoresist.

The key point is that this electric field can cause the "channel" region separating the source and drain to become the same type as the source-drain, thus turning the transistor "on".

In early MOSFET fabrication methodologies, the gate was made of aluminum which melts at 660 °C, so it had to be deposited as one of the last steps in the process after all the doping stages had been completed at around 1000 °C.

This parasitic capacitance requires that the entire chip be driven at high power levels to ensure clean switching which is inefficient.

Additionally, the variation in the misalignment of the gate to the underlying source-drain means that there is high chip-to-chip variability even when they are working properly.

Since they are always perfectly positioned, there is no need to make the gate wider than desired, and the parasitic capacitance is greatly reduced.

[2] After early experimentation with different gate materials using aluminum, molybdenum and amorphous silicon, the semiconductor industry almost universally adopted self-aligned gates made with polycrystalline silicon (poly-silicon), the so-called silicon-gate technology (SGT) or "self-aligned silicon-gate" technology, which had many additional benefits over the reduction of parasitic capacitances.

One important feature of SGT was that the transistor was entirely buried under top quality thermal oxide (one of the best insulators known), making it possible to create new device types, not feasible with conventional technology or with self-aligned gates made with other materials.

With additional processing steps, an aluminum gate would then be formed over the thin-oxide region completing the device fabrication.

While Bower’s idea was conceptually sound, in practice it did not work, because it was impossible to adequately passivate the transistors, and repair the radiation damage done to the silicon crystal structure by the ion implantation, since these two operations would have required temperatures in excess of the ones survivable by the aluminum gate.

The SGT was the first process technology used to fabricate commercial MOS integrated circuits that was later widely adopted by the entire industry in the 1960s.

In February 1968, Federico Faggin joined Les Vadasz's group and was put in charge of the development of a low-threshold-voltage, self-aligned gate MOS process technology.

The Bell Labs Kerwin et al. patent was not filed until March 27, 1967, several months after R. W. Bower and H. D. Dill had published and presented the first publication of this work at the International Electron Device Meeting, Washington, D.C. in 1966.

[8] In a legal action involving Bower, the Third Circuit Court of Appeals determined that Kerwin, Klein and Sarace were the inventors of the self-aligned silicon gate transistor.

The Bell Labs Kerwin et al patent 3,475,234 was not filed until March 27, 1967 several months after the R. W. Bower and H. D. Dill Published and presented the first publication of this work entitled INSULATED GATE FIELD EFFECT TRANSISTORS FABRICATED USING THE GATE AS SOURCE-DRAIN MASK at the International Electron Device Meeting, Washington, D.C., 1966.

[9] The first commercial product using self-aligned silicon-gate technology was the Fairchild 3708 8-bit analog multiplexor, in 1968, designed by Federico Faggin who pioneered several inventions in order to turn the aforementioned non working proofs of concept, into what the industry actually adopted thereafter.

Diagram of a standard MOSFET
Intel 1101
A cleanroom facility where these steps are performed