In the most general sense, the spacer is a layer that is deposited over a pre-patterned feature, often called the mandrel.
SADP may be re-applied for even higher resolution, and has already been demonstrated for 15 nm NAND flash memory.
At advanced nodes, spacer-based patterning can reduce the number of masks used for some cases by a factor of two.
In the alternative spacer-is-dielectric (SID) approach, the spacers define dielectric spaces between conducting features, and so no longer need cuts.
The SID approach has gained popularity due to its flexibility with minimal additional mask exposures.