These facilities enable a designer to simulate concurrent processes, each described using plain C++ syntax.
SystemC is often associated with electronic system-level (ESL) design, and with transaction-level modeling (TLM).
SystemC has semantic similarities to VHDL and Verilog, but may be said to have a syntactical overhead compared to these when used as a hardware description language.
On the other hand, it offers a greater range of expression, similar to object-oriented design partitioning and template classes.
Source code can be compiled with the SystemC library (which includes a simulation kernel) to give an executable.
[citation needed] SystemC version 1 included common hardware-description language features such as structural hierarchy and connectivity, clock-cycle accuracy, delta cycles, four-valued logic (0, 1, X, Z), and bus-resolution functions.
[5][6] The chief competitor at the time was SpecC another C based open source package developed by UC Irvine personnel and some Japanese companies.
Example code of an adder: The power and energy estimation can be accomplished in SystemC by means of simulations.
Powersim[7] is a SystemC class library aimed to the calculation of power and energy consumption of hardware described at system level.