Verilog, standardized as IEEE 1364, is a hardware description language (HDL) used to model electronic systems.
The non-blocking assignment allows designers to describe a state-machine update without needing to declare and use temporary storage variables.
Since these concepts are part of Verilog's language semantics, designers could quickly write descriptions of large circuits in a relatively compact and concise form.
At the time of Verilog's introduction (1984), Verilog represented a tremendous productivity improvement for circuit designers who were already using graphical schematic capture software and specially written software programs to document and simulate electronic circuits.
This system allows abstract modeling of shared signal lines, where multiple sources drive a common net.
Verilog modules that conform to a synthesizable coding style, known as RTL (register-transfer level), can be physically realized by synthesis software.
Further manipulations to the netlist ultimately lead to a circuit fabrication blueprint (such as a photo mask set for an ASIC or a bitstream file for an FPGA).
Verilog was created by Prabhu Goel, Phil Moorby and Chi-Lai Huang between late 1983 and early 1984.
[3] Chi-Lai Huang had earlier worked on a hardware description LALSD, a language developed by Professor S.Y.H.
Originally, Verilog was only intended to describe and allow simulation; the automated synthesis of subsets of the language to physically realizable structures (gates etc.)
[5] With the increasing success of VHDL at the time, Cadence decided to make the language available for open standardization.
In the same time frame Cadence initiated the creation of Verilog-A to put standards support behind its analog simulator Spectre.
Extensions to Verilog-95 were submitted back to IEEE to cover the deficiencies that users had found in the original Verilog standard.
Previously, code authors had to perform signed operations using awkward bit-level manipulations (for example, the carry-out bit of a simple 8-bit addition required an explicit description of the Boolean algebra to determine its correct value).
A generate–endgenerate construct (similar to VHDL's generate–endgenerate) allows Verilog-2001 to control instance and statement instantiation through normal decision operators (case–if–else).
And finally, a few syntax additions were introduced to improve code readability (e.g. always @*, named parameter override, C-style function/task/module header declaration).
Not to be confused with SystemVerilog, Verilog 2005 (IEEE Standard 1364-2005) consists of minor corrections, spec clarifications, and a few new language features (such as the uwire keyword).
This means that the order of the assignments is irrelevant and will produce the same result: flop1 and flop2 will swap values every clock.
The basic syntax is:
However, the examples presented here are the classic (and limited) subset of the language that has a direct mapping to real gates.
In this example the always @ statement would first execute when the rising edge of reset occurs which would place q to a value of 0.
However, in this model it will not occur because the always block is triggered by rising edges of set and reset – not levels.
FPGA tools allow initial blocks where reg values are established instead of using a "reset" signal.
It is possible to use always as shown below: The always keyword acts similar to the C language construct while(1) {..} in the sense that it will execute forever.
Consider the code snippet below: Depending on the order of execution of the initial blocks, it could be zero and zero, or alternately zero and some other arbitrary uninitialized value.
For the competing VHDL, a dedicated standard for multi-valued logic exists as IEEE 1164 with nine levels.
The PLI provides a programmer with a mechanism to transfer control from Verilog to a program function written in C language.
It is officially deprecated by IEEE Std 1364-2005 in favor of the newer Verilog Procedural Interface, which completely replaces the PLI.
The PLI (now VPI) enables Verilog to cooperate with other programs written in the C language such as test harnesses, instruction set simulators of a microcontroller, debuggers, and so on.