Virtex (FPGA)

[2] In addition, AMD offers the Spartan low-cost series, which continues to be updated and is nearing production utilizing the same underlying architecture and process node as the larger 7-series devices.

[3] Virtex FPGAs are typically programmed in hardware description languages such as VHDL or Verilog, using the Xilinx ISE or Vivado computer software.

[5][6][7] The Virtex series of FPGAs are based on Configurable Logic Blocks (CLBs), where each CLB is equivalent to multiple ASIC gates.

[14] Virtex-E includes a two million system gate device and supports twice the system-gate density and has a 50 percent higher I/O performance than the original Virtex FPGAs.

[17][18] Virtex-4 FPGAs have been used for the ALICE (A Large Ion Collider Experiment) at the CERN European laboratory on the French-Swiss border to map and disentangle the trajectories of thousands of subatomic particles.

[25] The Virtex-7 family was introduced in June 2010 on a 28 nm process technology,[26] and is reported to deliver a two-fold system performance improvement at 50 percent lower power compared to previous generation Virtex-6 devices.

[38] The Virtex-II Pro, Virtex-4, Virtex-5, and Virtex-6 FPGA families, which include up to two embedded IBM PowerPC cores, are targeted to the needs of system-on-chip (SoC) designers.

An array of Virtex 4 chips on a PCB.
A Virtex-6 chip.
A Virtex-II Pro