Double patterning has also been introduced to assist in shrinking distances between features, especially if dry lithography is used.
Chipmakers have initially voiced concerns about introducing new high-κ materials into the gate stack, for the purpose of reducing leakage current density.
Matsushita Electric Industrial Co. started mass production of system-on-a-chip (SoC) ICs for digital consumer equipment based on 45 nm process technology in June 2007.
[6] The PlayStation 3 Slim model introduced the Cell Broadband Engine in a 45 nm process.
In a 2008 Chipworks reverse-engineering,[11] it was disclosed that the trench contacts were formed as a "Metal-0" layer in tungsten serving as a local interconnect.
It was recently revealed[12] that both the Nehalem and Atom microprocessors used SRAM cells containing eight transistors instead of the conventional six, in order to better accommodate voltage scaling.