C-element

[4] In terms of the theory of lattices, the C-element is a semimodular distributive circuit, whose operation in time is described by a Hasse diagram.

[5][6][7][8] The C-element is closely related to the rendezvous[9] and join[10] elements, where an input is not allowed to change twice in succession.

To understand under what conditions the obtained circuit is workable, it is necessary to do additional analysis, which reveals that Thus, the naive implementation is correct only for slow environment.

[16] Depending on the requirements to the switching speed and power consumption, the C-element can be realized as a coarse- or fine-grain circuit.

[18] A single-output realization is workable if and only if:[19] In his report[3] Muller proposed to realize C-element as a majority gate with feedback.

However, to avoid hazards linked with skews of internal delays, the majority gate must have as small number of transistors as possible.

[27][28] Generally, C-elements with different timing assumptions[29] can be built on AND-OR-Invert (AOI)[30][31] or its dual, OR-AND-Invert (OAI) gate[32][33] and inverter.

Connecting an additional majority gate to the inverted output of C-element, we obtain inclusive OR (EDLINCOR) function:[36][37]

Some simple asynchronous circuits like pulse distributors[38] can be built solely on majority gates.

Semistatic C-element stores its previous state using two cross-coupled inverters, similar to an SRAM cell.

One of the inverters is weaker than the rest of the circuit, so it can be overpowered by the pull-up and pull-down networks.

If both inputs are 1, then the pull-down network changes the latch's state, making the C-element output a 1.

There are also versions of semistatic C-element built on devices with negative differential resistance (NDR).

[39][40] NDR is usually defined for small signal, so it is difficult to expect that such a C-element will operate in full range of voltages or currents.

[42][43] In particular, the so-called Maevsky's implementation [44][45][46] is a semimodular, but non-distributive (OR-causal) circuit loosely based on.

[48] A realization of C-element on two-input gates only has been proposed by Tsirlin [49] and then synthesized by Starodoubtsev et al. using Taxogram language[50] This circuit coincides with that attributed to Bartky ,[1][44] and can operate without the input latch.

Note that both the Maevsky and Tsirlin circuits are based actually on so-called David cell.

[58] Other technologies suitable for realizing asynchronous primitives including C-element, are: carbon nanotubes,[citation needed] single-electron tunneling devices,[59] quantum dots,[60] and molecular nanotechnology.

In the multiple-valued case, however, connecting the output of majority gate to one or several inputs may have no desirable effect.

Delays in the naive (based on Earle latch ) implementation and environment
Timing diagram of a C-element and inclusive OR gate
Behavior of the environment with multiple input transitions [ 1 ] (garbage branches [ 2 ] ) admissible for C-element and inadmissible for Join element
Static implementations of two- and three-input C-element, [ 20 ] [ 21 ] [ 22 ]
Semistatic implementations of two- and multiple-input C-element. [ 23 ] [ 24 ] [ 25 ] For a faster version see [ 26 ]
Majority-gate realization of C-element and inclusive OR gate (a); Realizations proposed by Maevsky (b), Tsirlin (c) and Murphy (d)
An STG of dual-rail C-element with 00 transit and its circuit realized only on NAND2 as a particular case of [ 18 ] considered by V.B. Marakhovsky.
David cell (a) and its fast implementations: gate-level (b) and transistor-level (c) [ 41 ]