[4] EPIC permits microprocessors to execute software instructions in parallel by using the compiler, rather than complex on-die circuitry, to control parallel instruction execution.
This was intended to allow simple performance scaling without resorting to higher clock frequencies.
[clarification needed] They began an investigation into a new architecture, later named EPIC.
One goal of EPIC was to move the complexity of instruction scheduling from the CPU hardware to the software compiler, which can do the instruction scheduling statically (with help of trace feedback information).
This eliminates the need for complex scheduling circuitry in the CPU, which frees up space and power for other functions, including additional execution resources.