Floorplan (microelectronics)

In electronic design automation, a floorplan of an integrated circuit is a schematic representation of tentative placement of its major functional blocks.

Depending on the design methodology being followed, the actual definition of a floorplan may differ.

Here are some examples: In some approaches the floorplan may be a partition of the whole chip area into axis aligned rectangles to be occupied by IC blocks.

This partition is subject to various constraints and requirements of optimization: block area, aspect ratios, estimated total measure of interconnects, etc.

Most of the problems related to finding optimal floorplans are NP-hard, i.e., require vast computational resources.

A mock floorplan viewed in an IC layout editor
A sliceable floorplan, with a slicing order indicated
The simplest non-sliceable floorplan