GDDR6 SDRAM

Just like GDDR5X it uses QDR (quad data rate) in reference to the write command clock (WCK) and ODR (Octal Data Rate) in reference to the command clock (CK).

[13][3] SK Hynix announced in April 2017 that its GDDR6 chips would be produced on a 21 nm process and be 10% lower voltage than GDDR5.

[3] SK Hynix began mass production in February 2018, with 8 Gbit chips and a data rate of 14 Gbit/s per pin.

[22] GDDR6X offers increased per-pin bandwidth between 19–21 Gbit/s with PAM4 signaling, allowing two bits per symbol to be transmitted and replacing earlier NRZ (non return to zero, PAM2) coding that provided only one bit per symbol, thereby limiting the per-pin bandwidth of GDDR6 to 16 Gbit/s.

PAM4 signalling is not new but it costs more to implement, partly because it requires more space in chips and is more prone to signal-to-noise ratio (SNR) issues,[24] which mostly limited its use to high speed networking (like 200G Ethernet).

On average, PAM4 consumes less power and uses fewer pins than differential signalling while still being faster than NRZ.