IP Cores are usually complex in size and nature and thus require highly sophisticated mechanisms to implant signatures within their design without disturbing the functionality.
Any small change in the functionality of the IP core renders the hardware watermarking process futile.
As the name suggests, in single-phase watermarking process the secret marks in the form of additional constraints are inserted in a particular phase of design abstraction level.
The register allocation phase of High-level synthesis is one of the popular locations where single-phase watermarking constraints are inserted.
As the name suggests, in the multi-phase watermarking process the additional constraints are inserted in multiple phases of a particular design abstraction level.
The main challenge of the multi-phase watermarking process is the dependence between additional constraints of multiple phases.