[3] The core has 4×32 64-bit general purpose registers (GPR) with full support for both little and big endian byte ordering, 16 KB+16 KB instruction and data cache and is capable of four-way multithreading.
The A2O is a slightly more modern version, written in Verilog,[4] using the Power ISA v.2.07 Book III-E.[5] It is optimized for single core performance and designed to reach 3 GHz at 45 nm process technology.
In the second half of 2020 IBM released the A2I and A2O cores under a Creative Commons license, and published the VHDL and Verilog code on GitHub.
Each chip uses the A2I core and has 8 MB of cache as well a multitude of task-specific engines besides the general-purpose processors, such as XML, cryptography, compression and regular expression accelerators each with MMUs of their own, four 10 Gigabit Ethernet ports and two PCIe lanes.
The chips are said to be extremely complex according to Charlie Johnson, chief architect at IBM,[9] and use 1.43 billion transistors on a die size of 428 mm2 fabricated using a 45 nm process.
The Blue Gene/Q chip is manufactured on IBM's copper SOI process at 45 nm, will deliver a peak performance of 204.8 GFLOPS at 1.6 GHz and draws about 55 watts.