MIS capacitor

The maximum capacitance, CMIS(max) is calculated analogously to the plate capacitor: where : The production method depends on materials used (it is even possible that polymers can be used as both the insulator or the semiconductor layers[1]).

For the steady reduction of the size of structures in microelectronics, the ever thinner insulation layers are required (to keep the same capacitance for smaller area).

However, when the oxide thickness falls below ~ 5 nm there arise parasitic leakages due to the tunneling effect.

In the MOSFET R&D, the MIS capacitors are extensively used as a relatively simple testing bench, e.g. to examine fabrication process and properties of the novel insulator materials, to measure leakage currents and charge-to-breakdown, to get the trap density value, to verify different models for carrier transport.

Furthermore, the capacitors are often included in tutorial courses, particularly to discuss their charge states (inversion, depletion, accumulation) which also occur in the more complex transistor systems.