These include Nanowires, Single-Electron Transistors, Quantum dot cellular automata, and Nanoscale Crossbar Latches.
These currently form the basis of most analog and digital circuit designs, the scaling of which drives Moore's Law.
This configuration is capable of being implemented with a high density using vertical semiconductor cylindrical channels with nanoscale diameters and Infineon Technologies and Samsung have begun research and development in this direction resulting in some basic patents[2][3] using nanowires and carbon nanotubes in MOSFET designs.
In an alternative approach,[4] Nanosys uses solution based deposition and alignment processes to pattern pre-fabricated arrays of nanowires on a substrate to serve as a lateral channel of an FET.
This concept arose when Intel co-founder Gordon Moore became interested in the cost of transistors and trying to fit more onto one chip.
In 2004, Harvard University nanotech pioneer Charles Lieber and his team have made a nanowire—10,000 times thinner than a sheet of paper—that contains a string of transistors.
This has been explained as the overall way the transistors are interconnected, so that the circuit can plug into a computer or other system and operate independently of the lower-level details.
Their architecture combines circuits that have redundant logic gates and interconnections with the ability to reconfigure structures at several levels on a chip.
In 1987, an IBM research team led by Bijan Davari demonstrated a metal–oxide–semiconductor field-effect transistor (MOSFET) with a 10 nm gate oxide thickness, using tungsten-gate technology.
[14][15][16][17] At UC Berkeley, FinFET devices were fabricated by a group consisting of Hisamoto along with TSMC's Chenming Hu and other international researchers including Tsu-Jae King Liu, Jeffrey Bokor, Hideki Takeuchi, K. Asano, Jakub Kedziersk, Xuejue Huang, Leland Chang, Nick Lindert, Shibly Ahmed and Cyrus Tabery.
In 2002, a team including Yu, Chang, Ahmed, Hu, Liu, Bokor and Tabery fabricated a 10 nm FinFET device.
[13] In 2005, Indian physicists Prabhakar Bandaru and Apparao M. Rao at UC San Diego developed the world's smallest transistor based to be made entirely from carbon nanotubes.
Before this discovery, logic circuits used nanotubes, but needed metal gates to be able to control the flow of electric current.
Some think in the nearer term, we could see hybrids of micro- and nano-: silicon with a nano core—perhaps a high-density computer memory that retains its contents forever.