Partial-response maximum-likelihood

PRML was introduced to recover data more reliably or at a greater areal-density than earlier simpler schemes such as peak-detection.

[1] These advances are important because most of the digital data in the world is stored using magnetic storage on hard disk or tape drives.

Recent read/write channels operate at much higher data-rates, are fully adaptive, and, in particular, include the ability to handle nonlinear signal distortion and non-stationary, colored, data-dependent noise (PDNP or NPML).

[5] By 1971, Hisashi Kobayashi at IBM had recognized that the Viterbi algorithm could be applied to analog channels with inter-symbol interference and particularly to the use of PR4 in the context of Magnetic Recording[6] (later called PRML).

(The wide range of applications of the Viterbi algorithm is well described in a review paper by Dave Forney.

In both cases, the initial equalization to PR4 response was done with analog circuitry but the Viterbi algorithm was performed with digital logic.

The first implementation of PRML was shipped in 1984 in the Ampex Digital Cassette Recording System (DCRS).

DCRS was a cassette-based, digital, instrumentation recorder capable of extended play times at very high data-rate.

The classical approach to maximum-likelihood detection on a channel with intersymbol interference (ISI) is to equalize to a minimum-phase, whitened, matched-filter target.

Given the rapid increase in complexity with longer targets, a post-processor architecture was proposed, firstly for EPRML.

This approach was found to be valuable when it was extended to systems employing a simple parity check[32][33][34] As data detectors became more sophisticated, it was found important to deal with any residual signal nonlinearities as well as pattern-dependent noise (noise tends to be largest when there is a magnetic transition between bits) including changes in noise-spectrum with data-pattern.

As a final step, the detectors were modified to include a 'noise predictor filter' thus allowing each pattern to have a different noise-spectrum.

The analog front-end typically includes AGC, correction for the nonlinear read-element response, and a low-pass filter with control over the high-frequency boost or cut.

A single integrated circuit contains the entire read and write channels (including the iterative decoder) as well as all the disk control and interface functions.