The ROPs perform the transactions between the relevant buffers in the local memory – this includes writing or reading values, as well as blending them together.
All data rendered has to travel through the ROP in order to be written to the framebuffer, from there it can be transmitted to the display.
Historically the number of ROPs, texture mapping units (TMUs), and shader processing units/stream processors have been equal.
However, from 2004, several GPUs have decoupled these areas to allow optimum transistor allocation for application workload and available memory performance.
This design also allows chip makers to build a modular line-up, where the top-end GPUs are essentially using the same logic as the low-end products.