The TO element stands for "transistor outline" and refers to a series of technical drawings produced by JEDEC.
[1] The pins are isolated from the package by individual glass-metal seals, or by a single resin potting.
Several variants of the original TO-5 package have the same cap dimensions but differ in the number and length of the leads (wires).
Somewhat incorrectly, TO-5 and TO-39 are often used in manufacturer's literature as synonyms for any package with the cap dimensions of TO-5, regardless of the number of leads, or even for any package with the diameter of TO-5, regardless of the cap height and the number of leads.
For transistors, the fourth wire is typically connected to the metal case as a means of electromagnetic shielding for radio frequency applications.
This allows a slightly increased chip area in a cap of unchanged diameter.
This allows a slightly increased chip area in a cap of unchanged diameter.
TO-205 is intended to replace previous definitions of packages with leads arranged in a circle with a diameter of 5.08 mm (0.200 in).
A new package with 3 leads and a cap height of 4.32 mm (0.170 in) (similar to TO-78 / TO-99) is added as TO-205-AF.