VIA Nano

This Isaiah 64-bit architecture was designed from scratch, unveiled on 24 January 2008,[2][3][4][5] and launched on 29 May, including low-voltage variants and the Nano brand name.

Power consumption is also expected to be on par with the previous-generation VIA CPUs, with thermal design power ranging from 5 W to 25 W.[7] Being a completely new design, the Isaiah architecture was built with support for features like the x86-64 instruction set and x86 virtualization which were unavailable on its predecessors, the VIA C7 line, while retaining their encryption extensions.

[8][9][10] In a 2008 Ars Technica test, a VIA Nano gained significant performance in memory subsystem after its CPUID changed to Intel, hinting at the possibility that the benchmark software only checks the CPUID instead of the actual features supported by the CPU to choose a code path.

[13] The 3000 series adds the SSE4 SIMD instruction set extensions, which were first introduced with 45 nm revisions of the Intel Core 2 architecture.

The VIA Nano X2 is built on a 40 nm process and supports the SSE4 SIMD instruction set extensions, critical to modern floating point dependent applications.

VIA Nano 2 Logo
VIA Isaiah floorplan
VIA Isaiah Architecture die floor-plan