Wilson current mirror
[1][2] Wilson devised this configuration in 1967 when he and Barrie Gilbert challenged each other to find an improved current mirror overnight that would use only three transistors.
[3] There are three principal metrics of how well a current mirror will perform as part of a larger circuit.
Minimizing this difference is critical in such applications of a current mirror as the differential to single-ended output signal conversion in a differential amplifier stage because this difference controls the common mode and power supply rejection ratios.
These voltages affect the headroom to the power supply rails that are available for the circuitry in which the current mirror is embedded.
[citation needed] An approximate analysis due to Gilbert[3] shows how the Wilson current mirror works and why its static error should be very low.
[citation needed] A more exact formal analysis shows the expected static error.
This method of direct generation of a reference current from the power supply using a resistor rarely has adequate stability for practical applications and more complex circuits are used to provide reference currents independent of temperature and supply voltages.
[4] Equation (4) substantially underestimates the differences between the input and output currents that are generally found in this circuit for three reasons.
The Early effect (base-width modulation) in Q1 will force its collector current to be slightly higher than that of Q2.
This problem can be essentially eliminated by the addition of a fourth transistor, shown as Q4 in the improved Wilson current mirror of Fig.
Beta mismatches of five percent or more are reported[3] to be common, causing an order of magnitude increase in the static error.
For example, Q1 and Q2 may each be implemented as a pair of paralleled transistors arranged as a cross-coupled quad in a common-centric layout to reduce effects of local gradients in current gain.
3 shows a small signal model of a Wilson current mirror drawn with a test voltage source,
is the usual thermal voltage, the product of the Boltzmann constant and absolute temperature divided by the charge of an electron.
At low bias currents, the impedances in the circuit are high enough that the effect of frequency may be dominated by device and parasitic capacitances shunting the input and output nodes to ground, lowering the input and output impedances.
By equation (4) one might expect the magnitude of the ratio of output to input current at that frequency to differ from unity by about 2%.
Gilbert[3] shows a simulation of a Wilson current mirror implemented in NPN transistors with
By contrast, the standard two-transistor mirror operates down to the saturation voltage of its output transistor.
By forcing a match between the collector voltages of Q1 and Q2, the circuit makes the performance degradation at high current on the input and output branches symmetric.
[10] These include ones in which the mismatch from base current are reduced with an emitter follower,[3] circuits that use cascoded structures or resistor degeneration to lower the static error and raise output impedance, and gain-boosted current mirrors that use an internal error amplifier to improve the effectiveness of cascoding.
[10] If the transistor pairs M1/M2 and M3/M4 are exactly matched and the input and output potentials are approximately equal, then in principle there is no static error, the input and output currents are equal because there is no low frequency or DC current into the gate of a MOSFET.
and truncating after the first linear term, leads to an expression for the mismatch of the drain currents of M1 and M2 as: The statistics of the variation in threshold voltage of matched pairs across a wafer have been studied extensively.
[12] Similarly, careful layout is required to minimize the effect of the second, geometric term in (9) that is proportional to
One possibility is to subdivide transistors M1 and M2 into multiple devices in parallel that are arranged in a common-centric or interdigitated layout with or without dummy guard structures on the perimeter.
[13] The output impedance of the MOSFET Wilson current mirror can be calculated in the same way as for the bipolar version.
The principal limitation on the use of the Wilson current mirror in MOS circuits is the high minimum voltages between the ground connection in Fig.
The threshold voltage of MOS devices is usually between 0.4 and 1.0 volts with no body effect depending on the manufacturing technology.
Many contemporary integrated circuits are designed to use low voltage power supplies to accommodate the limitations of short-channel transistors, to meet the need for battery operated devices and to have high power efficiency in general.
The result is that new designs tend to use some variant of a wide swing cascode current mirror configuration.
[10][14][15] In the case of extremely low power supply voltages of one volt or less, the use of current mirrors may be abandoned entirely.
