Wired logic connection

Limitations include the inability to create a NOT gate, the lack of amplification to provide level restoration, and its constant ohmic heating for most logic (particularly more than CMOS) which indirectly limits density of components and speed.

Care should be taken to ensure the output still lies within valid voltage levels.

See also: Diode logic § Active-high OR logic gate The wired OR connection electrically performs the Boolean logic operation of an OR gate using open emitter or similar inputs (which can be identified by the ⎏ symbol in schematics) connected to a shared output with a pull-down resistor.

However, each stage of diode logic reduces output voltage levels.

So without amplification, the output voltage may not be compatible with the primary logic family.

Open-collector buffers connected as wired AND.
Open-emitter buffers connected as wired OR.