[6] Ross Freeman, Bernard Vonderschmitt, and James V Barnett II—all former employees of Zilog, an integrated circuit and solid-state device manufacturer—co-founded Xilinx in 1984 with headquarters in San Jose, USA.

[12][15] While working for Zilog, Freeman wanted to create chips that acted like a blank tape, allowing users to program the technology themselves.

Freeman could not convince Zilog to invest in FPGAs to chase a market then estimated at $100 million,[12] so he and Barnett left to team up with Vonderschmitt, a former colleague.

[12] The company also moved to a 144,000-square-foot (13,400 m2) plant in San Jose, California, to handle increasingly large orders from HP, Apple Inc., IBM and Sun Microsystems.

[39] In November 2018, the company's Zynq UltraScale+ family of multiprocessor system-on-chips was certified to safety integrity level (SIL) 3 HFT1 of the IEC 61508 specification.

[71] The device covers the entire sub-6 GHz spectrum, which is necessary for 5G, and the updates included: an extended millimeter wave interface, up to 20% power reduction in the RF data converter subsystem compared to the base portfolio, and support of 5G New Radio.

[74] The second announcement revealed that Xilinx and Samsung Electronics performed the world's first 5G New Radio (NR) commercial deployment in South Korea.

[75][76] The two companies developed and deployed 5G massive multiple-input, multiple-output (m-MIMO) and millimeter wave (mmWave) products using Xilinx's UltraScale+ platform.

[76] The companies also announced collaboration on Xilinx's Versal adaptable compute acceleration platform (ACAP) products that will deliver 5G services.

[77] In February 2019, Xilinx introduced an HDMI 2.1 IP subsystem core, which enabled the company's devices to transmit, receive, and process up to 8K (7680 x 4320 pixels) UHD video in media players, cameras, monitors, LED walls, projectors, and kernel-based virtual machines.

[89][90] On October 1, 2019, Xilinx announced the launch of Vitis, a unified free and open source software platform that helps developers take advantage of hardware adaptability.

In December 2020, Xilinx announced they were acquiring the assets of Falcon Computing Systems to enhance the free and open source Vitis platform, a design software for adaptable processing engines to enable highly optimized domain specific accelerators.

[104] That same month, the company unveiled the Kria portfolio, a line of small form factor system-on-modules (SOMs) that come with a pre-built software stack to simplify development.

[16] Xilinx sells both FPGAs and CPLDs for electronic equipment manufacturers in end markets such as communications, industrial, consumer, automotive and data processing.

[107][108][109][110][111][112][113] Xilinx's FPGAs have been used for the ALICE (A Large Ion Collider Experiment) at the CERN European laboratory on the French-Swiss border to map and disentangle the trajectories of thousands of subatomic particles.

[115] Xilinx FPGAs can run a regular embedded OS (such as Linux or vxWorks) and can implement processor peripherals in programmable logic.

[16] The Virtex-II Pro, Virtex-4, Virtex-5, and Virtex-6 FPGA families, which include up to two embedded PowerPC cores, are targeted to the needs of system-on-chip (SoC) designers.

[124][125][122][123] In early 2011, Xilinx began shipping the Zynq-7000 SoC platform immerses ARM multi-cores, programmable logic fabric, DSP data paths, memories and I/O functions in a dense and configurable mesh of interconnect.

[126][127] The platform targets embedded designers working on market applications that require multi-functionality and real-time responsiveness, such as automotive driver assistance, intelligent video surveillance, industrial automation, aerospace and defense, and next-generation wireless.

[147][148] Xilinx's newer FPGA products use a High-K Metal Gate (HKMG) process, which reduces static power consumption while increasing logic capacity.

[161] The Virtex 7 family, is based on a 28nm design and is reported to deliver a two-fold system performance improvement at 50 percent lower power compared to previous generation Virtex-6 devices.

The Kintex family includes high-performance 12.5 Gbit/s or lower-cost optimized 6.5 Gbit/s serial connectivity, memory, and logic performance required for applications such as high volume 10G optical wired communication equipment, and provides a balance of signal processing performance, power consumption and cost to support the deployment of Long Term Evolution (LTE) wireless networks.

[147][148] In August 2018, SK Telecom deployed Xilinx Kintex UltraScale FPGAs as their artificial intelligence accelerators at their data centers in South Korea.

[168] The Zynq-7000 family of SoCs addresses high-end embedded-system applications, such as video surveillance, automotive-driver assistance, next-generation wireless, and factory automation.

The Zynq architecture differs from previous marriages of programmable logic and embedded processors by moving from an FPGA-centric platform to a processor-centric model.

[126][127][169] For software developers, Zynq-7000 appear the same as a standard, fully featured ARM processor-based system-on-chip (SoC), booting immediately at power-up and capable of running a variety of operating systems independently of the programmable logic.

[32][140] Xilinx's new Vivado Design Suite addressed this issue, because the software was developed for higher capacity FPGAs, and it included high level synthesis (HLS) functionality that allows engineers to compile the co-processors from a C-based description.

[168] Because EasyPath devices are identical to the FPGAs that customers are already using the parts can be produced faster and more reliably from the time they are ordered compared to similar competing programs.

[177] They are designed for a wide range of applications in the fields of big data and machine learning, including video transcoding, database querying, data compression, search, AI inferencing, machine vision, computer vision, autonomous vehicles, genomics, computational storage and network acceleration.

[178] In July 2021, Xilinx debuted the Versal HBM, which combines the network interface of the platform with HBM2e memory to alleviate data bottlenecking.