Low Vth devices switch faster, and are therefore useful on critical delay paths to minimize clock periods[clarification needed].
High Vth devices are used on non-critical paths to reduce static leakage power without incurring a delay penalty.
A common method of fabricating multi-threshold CMOS involves simply adding additional photolithography and ion implantation steps.
[2] For a given fabrication process, the Vth is adjusted by altering the concentration of dopant atoms in the channel region beneath the gate oxide.
[3] The sleep signal is de-asserted during active mode, causing the transistor to turn on and provide virtual power (ground) to the low Vth logic.
However, a large amount of area overhead is added due both to inclusion of additional transistors in every Boolean gate, and in creating a sleep signal distribution tree.
An intermediate approach is to incorporate high Vth sleep transistors into threshold gates having more complicated function.