eSi-RISC

eSi-RISC is a configurable CPU architecture.

Each of these processors is licensed as soft IP cores, suitable for integrating into both ASICs and FPGAs.

[2] The main features of the eSi-RISC architecture are:[3] While there are many different 16 or 32-bit Soft microprocessor IP cores available, eSi-RISC is the only architecture licensed as an IP core that has both 16 and 32-bit implementations.

This improves code density without compromising performance.

Ported RTOSes include MicroC/OS-II, FreeRTOS, ERIKA Enterprise[7] and Phoenix-RTOS[8]