Ne-XVP

Ne-XVP was a research project executed between 2006-2008 at NXP Semiconductors.

The project undertook a holistic approach to define a next generation multimedia processing architecture for embedded MPSoCs that targets programmability, performance scalability, and silicon efficiency in an evolutionary way.

The evolutionary way implies using existing processor cores such as NXP TriMedia as building blocks and supporting industry programming standards such as POSIX threads.

Based on the technology-aware design space exploration, the project concluded that hardware accelerators facilitating task management and coherency coupled with right dimensioning of compute cores deliver good programmability, scalable performance and competitive silicon efficiency.

Ne-XVP's research subjects and corresponding publications:

Ne-XVP architecture at the end of 2008. Two different core types core1 and core2 are used to construct a multicore processor. To increase performance density the multicore is supported by several accelerators for inter-thread synchronization and communication. For example, the Hardware Task Scheduler can schedule tasks for many complex multimedia applications, and the cache coherence coprocessors enable inter-thread communication via shared memory.
Ne-XVP team at the end of 2008. (left-to-right, top-to-bottom) Surendra Guntur, Jan Hoogerbrugge, Ghiath Al-Kadi, Marc Duranton, Andrei Terechko, Anirban Lahiri.