[2] In April 1967, Joel Karp and Elizabeth de Atley published an article, "Use four-phase MOS IC logic" in Electronic Design magazine.
"[4] Wanlass had been director of research and engineering at General Instrument Microelectronics Division in New York since leaving Fairchild Semiconductor in 1964.
Lee Boysel, a disciple of Wanlass[5] and a designer at Fairchild Semiconductor, and later founder of Four-Phase Systems, gave a "late news" talk on a four-phase 8-bit adder device in October 1967 at the International Electron Devices meeting.
[6] J. L. Seely, manager of MOS Operations at General Instrument Microelectronics Division, also wrote about four-phase logic in late 1967.
[7] In 1968 Boysel published an article "Adder on a Chip: LSI Helps Reduce Cost of Small Machine" in Electronics magazine;[8] Four-phase papers from Y. T. Yen also appeared that year.
[11] Boysel recalls that four-phase dynamic logic allowed him to achieve 10X the packing density, 10X the speed, and 1/10 the power compared to other MOS techniques being used at the time (metal-gate saturated-load PMOS logic), using the first-generation MOS process at Fairchild.
[14] With the advent of CMOS, the precharge transistor could be changed to be the complement of the logic transistor type, which allows the gate's output to charge quickly up to the high level of the clock line, thus improving the speed, signal swing, power consumption, and noise margin.