IBM ROMP

The ROMP is a reduced instruction set computer (RISC) microprocessor designed by IBM in the late 1970s.

A later CMOS version of the ROMP was first used in the coprocessor board for the IBM 6152 Academic System introduced in 1988, and it later appeared in some models of the RT PC.

The original ROMP had a 24-bit architecture, but the instruction set was changed to 32 bits a few years into the development.

An improved CMOS version of the ROMP was first used in the IBM 6152 Academic System workstation, and later in some models of the RT PC.

IBM Research used the ROMP in its Research Parallel Processor Prototype (RP3), an early experimental scalable shared-memory multiprocessor that supported up to 512 processors first detailed in 1985; and the CMOS version in its ACE, an experimental NUMA multiprocessor that was operational in 1988.

The ROMP used a bypass network and appropriately scheduled the register file reads and writes to support back-to-back execution of dependent instructions.

[7] The ROMP and Rosetta were originally implemented in an IBM 2 μm silicon-gate NMOS technology with two levels of metal interconnect.