Because of its instruction-set complexity, its multi-chip implementation, and design flaws, the iAPX 432 was very slow in comparison to other processors of its time.

In 1984, Intel and Siemens started a joint project, ultimately called BiiN, to create a high-end, fault-tolerant, object-oriented computer system programmed entirely in Ada.

Many of the original i432 team members joined this project, although a new lead architect, Glenford Myers, was brought in from IBM.

Intel's major contribution to the BiiN system was a new processor design, influenced by the protected-memory concepts from the i432.

The new design was to include a number of features to improve performance and avoid problems that had led to the i432's downfall.

The first 960 processors entered the final stages of design, known as taping-out, in October 1985 and were sent to manufacturing that month, with the first working chips arriving in late 1985 and early 1986.

Myers attempted to save the design by extracting several subsets of the full capability architecture created for the BiiN system.

Myers was unsuccessful at convincing Intel management to support the i960 as a general-purpose or Unix processor, but the chip found a ready market in early high-performance 32-bit embedded systems.

The competing Stanford University design, MIPS, did not use this system, instead relying on the compiler to generate optimal subroutine call and return code.

This meant the CPUs were much larger than necessary for the "actually supported" feature sets, and as a result, more expensive to manufacture than they needed to be.

[11] The i960KA became successful as a low-cost 32-bit processor for the laser-printer market, as well as for early graphics terminals and other embedded applications.

It featured a newly designed superscalar RISC core and added an unusual addressable on-chip cache, but lacked an FPU and MMU, as it was intended for high-performance embedded applications.

It features a 32-bit multiplexed address/data bus, instruction and data cache, 1K on-chip RAM, interrupt controller, and two independent 32-bit timers.

Intel attempted to bolster the i960 in the I/O device controller market with the I2O standard, but this had little success and the design work was eventually ended.

By the mid-1990s its price/performance ratio had fallen behind competing chips of more recent design, and Intel never produced a reduced-power-consumption version that could be used in battery-powered systems.

[15][16] An i960RS chip also powers Adaptec's AAR-2400A controller, which uses four commodity parallel ATA drives to build an affordable RAID-5 protected fault-tolerant storage system for small PC servers and workstations.

The Indian Air Force's HAL Tejas light combat aircraft's MMR (multi-mode radar) is said to use the i960.

The Indian Space Research Organisation (ISRO) is said to use the chip in its on-board computers in its launch vehicles.