Modern technologies allow the creation of features on the order of 5 nanometers (nm), far below the normal resolution possible using deep ultraviolet (DUV) light.
This process starts with the design of the IC circuitry as a series of layers than will be patterned onto the surface of a sheet of silicon or other semiconductor material known as a wafer.
Each layer of the ultimate design is patterned onto a photomask, which in modern systems is made of fine lines of chromium deposited on highly purified quartz glass.
This causes the sharply focused light from the UV lamp to spread out on the far side of the mask and becoming increasingly unfocussed over distance.
Producing a diffraction-free image was ultimately solved through the projection aligner systems, which dominated chip making through the 1970s and early 1980s.
The relentless drive of Moore's law ultimately reached the limit of what the projection aligners could handle.
Together, they have allowed feature size to continue to shrink to orders of magnitude below the diffraction limit of the optics.
Both the lithographic compensations and manufacturability improvements are usually grouped under the heading resolution enhancement techniques (RET).
Such techniques have been used since the 180nm node and have become more aggressively used as minimum feature size as dropped significantly below that of the imaging wavelength, currently limited to 13.5 nm.