Dual in-line package

The dual-inline format was invented by Don Forbes, Rex Rice and Bryant Rogers at Fairchild R&D in 1964,[2] when the restricted number of leads available on circular transistor-style packages became a limitation in the use of integrated circuits.

A DIP is usually referred to as a DIPn, where n is the total number of pins, and sometimes appended with the row-to-row package width "N" for narrow (0.3") or "W" for wide (0.6").

Many analog and digital integrated circuit types are available in DIP packages, as are arrays of transistors, switches, light emitting diodes, and resistors.

DIP packages are usually made from an opaque molded epoxy plastic pressed around a tin-, silver-, or gold-plated lead frame that supports the device die and provides connection pins.

Most DIP packages are secured to a PCB by inserting the pins through holes in the board and soldering them in place.

Dallas Semiconductor manufactured integrated DIP real-time clock (RTC) modules which contained an IC chip and a non-replaceable 10-year lithium battery.

The original dual-in-line package was invented by Bryant "Buck" Rogers in 1964 while working for Fairchild Semiconductor.

[5] The package was well-suited to automated assembly equipment; a PCB could be populated with scores or hundreds of ICs, then all the components on the circuit board could be soldered at one time on a wave soldering machine and passed on to automated testing machines, with very little human labor required.

However, with In-System Programming (ISP) technology now state of the art, this advantage of DIPs is rapidly losing importance as well.

Sockets allow easy replacement of a device and eliminates the risk of damage from overheating during soldering.

DIPs are also used with breadboards, a temporary mounting arrangement for education, design development or device testing.

The body (housing) of a DIP containing an IC chip is usually made from molded plastic or ceramic.

The top of the package covers all of this delicate assemblage without crushing the bond wires, protecting it from contamination by foreign materials.

For some, LED displays particularly, the housing is usually a hollow plastic box with the bottom/back open, filled (around the contained electronic components) with a hard translucent epoxy material from which the leads emerge.

Often, the same chips were also sold in less expensive windowless PDIP or CERDIP packages as one-time programmable (OTP) versions.

[9] One variant of the single in-line package uses part of the lead frame for a heat sink tab.

The QIL design increased the spacing between solder pads without increasing package size, for two reasons: Commonly found DIP packages that conform to JEDEC standards use an inter-lead spacing (lead pitch) of 0.1 inches (2.54 mm) (JEDEC MS-001BA).

very popular, particularly in consumer electronics and personal computers, is essentially a shrunk version of the standard IC PDIP, the fundamental difference which makes it an SMT device being a second bend in the leads to flatten them parallel to the bottom plane of the plastic housing.

Owners of personal computers containing Intel 80286 through P5 Pentium processors may be most familiar with these PGA packages, which were often inserted into ZIF sockets on motherboards.

The similarity is such that a PGA socket may be physically compatible with some DIP devices, though the converse is rarely true.

4000-series logic ICs in 0.3" wide 14-pin plastic DIP packages (DIP14N), also known as PDIP (Plastic DIP)
EPROM ICs in 0.6" wide ceramic DIP40W, DIP32W, DIP28W, DIP24W packages, also known as CDIP (Ceramic DIP)
Eight-contact DIP switch with 0.3" wide 16-pin (DIP16N) footprint
An operating prototyped circuit on a solderless breadboard incorporating four DIP ICs, a DIP LED bargraph display (upper left), and a DIP 7-segment LED display (lower left)
Breadboard prototype: Ultrasonic microphone preamp build with SMD-parts soldered to DIP and SIP breakout boards
Side view of a dual in-line package (DIP) IC
Dual in-line (DIP) integrated circuit metal tape base with contacts
Several PDIPs and CERDIPs. The large CERDIP in the foreground is an NEC 8080AF ( Intel 8080 -compatible) microprocessor.
Package sample for single in-line package (SIP or SIL) devices
A Rockwell 6502 -based microcontroller in a QIP
Pin numbering is counter-clockwise