Semiconductor device modeling

From the digital systems point of view the key parameters of interest are: timing delays, switching power, leakage current and cross-coupling (crosstalk) with other blocks.

Key parameters that relate device behavior to system performance include the threshold voltage, driving current and subthreshold characteristics.

[1][2][3] Physics driven device modeling is intended to be accurate, but it is not fast enough for higher level tools, including circuit simulators such as SPICE.

For mobility modeling at the physical level the electrical variables are the various scattering mechanisms, carrier densities, and local potentials and fields, including their technology and ambient dependencies.

In the 1970s and 1980s NMOS was favored owing to speed and area advantages, coupled with technology limitations and concerns related to isolation, parasitic effects and process complexity.

During that era of NMOS-dominated LSI and the emergence of VLSI, the fundamental scaling laws of MOS technology were codified and broadly applied.

[6] It was also during this period that TCAD reached maturity in terms of realizing robust process modeling (primarily one-dimensional) which then became an integral technology design tool, used universally across the industry.

This third generation of TCAD tools became critical to address the full complexity of twin-well CMOS technology (see Figure 3a), including issues of design rules and parasitic effects such as latchup.

Hierarchy of technology CAD tools building from the process level to circuits. Left side icons show typical manufacturing issues; right side icons reflect MOS scaling results based on technology CAD (TCAD) . Credit: Prof. Robert Dutton in CRC Electronic Design Automation for IC Handbook, Vol II, Chapter 25, by permission.
Schematic of two stages of CMOS inverter, showing input and output voltage-time plots. I on and I off (along with I DG , I SD and I DB components) indicate technologically controlled factors. Credit: Prof. Robert Dutton in CRC Electronic Design Automation for IC Handbook , Vol II, Chapter 25, by permission.
An example of physics driven modeling of a MOSFET. The color contours indicate space resolved local density of states . Gate bias is varied in a nanowire MOSFET at drain bias Vd=0.6V. Notice the confined energy levels as they move with gate bias.