Electromigration is the transport of material caused by the gradual movement of the ions in a conductor due to the momentum transfer between conducting electrons and diffusing metal atoms.
As the structure size in electronics such as integrated circuits (ICs) decreases, the practical significance of this effect increases.
The earliest commercially available ICs failed in a mere three weeks of use from runaway electromigration, which led to a major industry effort to correct this problem.
Currently interconnects are only hundreds to tens of nanometers in width, making research in electromigration increasingly important.
Since reliability is critically important for space travel, military purposes, anti-lock braking systems, medical equipment like Automated External Defibrillators and is even important for personal computers or home entertainment systems, the reliability of chips (ICs) is a major focus of research efforts.
Due to the difficulty of testing under real-world conditions, Black's equation is used to predict the life span of integrated circuits.
[3] Although damage from electromigration ultimately results in the failure of the affected IC, the first symptoms are intermittent glitches, which are quite challenging to diagnose.
As some interconnects fail before others, the circuit exhibits seemingly random errors, which may be indistinguishable from other failure mechanisms (such as electrostatic discharge damage).
In a laboratory setting, electromigration failure is readily imaged with an electron microscope, as interconnect erosion leaves telltale visual markers on the metal layers of the IC.
[6] Nearly all IC design houses use automated EDA tools to check and correct electromigration problems at the transistor layout-level.
When operated within the manufacturer's specified temperature and voltage range, a properly designed IC device is more likely to fail from other (environmental) causes, such as cumulative damage from gamma-ray bombardment.
In the late 1980s, one line of Western Digital's desktop drives suffered widespread, predictable failure after 12–18 months of field usage.
Using forensic analysis of the returned bad units, engineers identified improper design-rules in a third-party supplier's IC controller.
By replacing the bad component with that of a different supplier, WD was able to correct the flaw, but not before significant damage was done to the company's reputation.
The degradation of the aluminium layer causes an increase in on-state resistance, and can eventually lead to complete failure.
The shape of the conductor, the crystallographic orientation of the grains in the metal, procedures for the layer deposition, heat treatment or annealing, characteristics of the passivation, and the interface to other materials also affect the durability of the interconnects.
Step bunching on DC-heated sublimating vicinal crystal surfaces of Si(111) was observed by A. Latyshev et al. in 1989.
[8] Soon after, Stoyan Stoyanov advanced a model in which as the reason for step bunching is identified the biased diffusion of the adatoms.
Moreover, annealing W(110) offcut in the [001] direction with an up-step current produced a morphology where the bunch edges formed zigzag segments meeting at right angles.
Since the metal ions in these regions are bonded more weakly than in a regular crystal lattice, once the electron wind has reached a certain strength, atoms become separated from the grain boundaries and are transported in the direction of the current.
In an ideal conductor, where atoms are arranged in a perfect lattice structure, the electrons moving through it would experience no collisions and electromigration would not occur.
However, in high-power situations (such as with the increasing current draw and decreasing wire sizes in modern VLSI microprocessors), if many electrons bombard the atoms with enough force to become significant, this will accelerate the process of electromigration by causing the atoms of the conductor to vibrate further from their ideal lattice positions, increasing the amount of electron scattering.
At the end of the 1960s J. R. Black developed an empirical model to estimate the MTTF (mean time to failure) of a wire, taking electromigration into consideration.
This minimum length is typically some tens of microns for chip traces, and interconnections shorter than this are sometimes referred to as 'electromigration immortal'.
For solder joints (SnPb or SnAgCu lead-free) used in IC chips, however, electromigration occurs at much lower current densities, e.g. 104 A/cm2.
The atoms accumulate at the anode, while voids are generated at the cathode and back stress is induced during electromigration.
Electromigration also influences formation of intermetallic compounds, as the migration rates are a function of atomic mass.
The complete mathematical model describing electromigration consists of several partial differential equations (PDEs) [21] which need to be solved for three-dimensional geometrical domains representing segments of an interconnect structure.
Such a mathematical model forms the basis for simulation of electromigration in modern technology computer aided design (TCAD) tools.
Results of TCAD studies in combination with reliability tests lead to modification of design rules improving the interconnect resistance to electromigration.