Open collector

One of the IC's internal high or low voltage rails typically connects to another terminal of that transistor.

These open outputs configurations are often used for digital applications when the transistor acts as a switch, to allow for logic-level conversion, wired-logic connections, and line sharing.

External pull-up/down resistors are typically required to set the output during the Hi-Z state to a specific voltage.

Microelectronic devices using nMOS open drain output may provide a 'weak' (high-resistance, often on the order of 100 kΩ) internal pull-up resistor to connect the terminal in question to the positive power supply of the device so their output voltage doesn't float.

External pullups may be 'stronger' (lower resistance, perhaps 3 kΩ) to reduce signal rise times (like with I²C) or to minimize noise (like on system RESET inputs).

[3] For pMOS open drain, the output instead connects to the positive power rail when the transistor is on, and is hi-Z when off.

This technique is commonly used by logic circuits operating at 5 V or lower to drive higher voltage devices such as electric motors, LEDs in series,[8] 12 V relays, 50 V vacuum fluorescent displays, or Nixie tubes requiring more than 100 V. Another advantage is that more than one open-collector output can be connected to a single line.

By tying the output of several open collectors together and connecting to a pull-up resistor, the common line becomes a wired AND in active high logic.

If push–pull output was mistakenly used instead, the active device attempting to set the line voltage low would be in competition with the other devices attempting to set the line voltage high, which would result in unpredictable output and heat.

Open collector outputs can also be useful for analog weighting, summing, limiting, digital-to-analog converters, etc., but such applications are not discussed here.

Higher operating speeds require lower resistor values for faster pull-up, which consume even more power.

This is why the term "pseudo" has to be used here: there is some pull-up on the driver side when output is at high state, the remaining pull-up strength is provided by parallel-terminating the receiver at the far end to the high voltage, often using a switchable, on-die terminator instead of a separate resistor.

A comparison[15] of both DDR3 and DDR4 termination schemes in terms of skew, eye aperture and power consumption was published in late 2011.[relevant?]

NPN open collector output schematic. A signal from an IC 's internal function is applied as the base input for a NPN BJT transistor, which controls the transistor's switching to the IC's ground. The external output is the transistor's collector.
nMOS open drain output is pulled Low when the nMOS is conducting. In the nonconducting hi-Z state, an external resistor pulls the output High so the output's voltage does not float.
Schematic symbol for a buffer with open-collector output [ 6 ]
Four inputs are connected to open-collector buffers . If all inputs are high, each buffer will be in a high-impedance state and the pull-up resistor will pull the output high. But if any input is low, the output will be pulled low by the buffer for that input. This corresponds to wired AND in active-high logic, or to wired OR in active-low logic, and allows multiple inputs to share the same output wire.
Pseudo open drain usage in DDR interfaces